Programmable logic devices (PLDs) such as field programmable gate arrays (FPGAs) and complex programmable logic devices (CPLDs) are becoming increasingly popular as a circuit technology for a variety of applications. Attributes of reconfigurability and shortened design-to-implementation time in many instances may provide competitive advantages.
Traditionally, designs for electronic circuits have been specified using a hardware description language (HDL) such as Verilog or VHDL. HDLs allow circuit designers to design and document electronic systems at various levels of abstraction. Designs for programmable logic devices (PLDs), such as field programmable gate arrays (FPGAs) and application specific integrated circuits (ASICs), can be modeled using an HDL. The design then can be simulated and tested using appropriate software-based design and/or synthesis tools.
One recent trend in circuit design has been to use high-level programming languages (HLLs) to design electronic circuits. For example, a circuit design can be specified initially as a program written in an HLL such as Fortran, C/C++, JAVA, or the like. This approach allows a developer to concentrate on an algorithmic solution to a problem rather than the specific hardware involved. A variety of different tools are available which effectively translate the HLL program into a synthesizable netlist or other software-based circuit representation.
In some instances the design may be too large to be implemented on a particular PLD. The designer may choose to implement part(s) of the design in programmable logic resources of the PLD and another part(s) of the design on a processor. For some PLDs, such as some Virtex FPGAs from XILINX, Inc., both an on-chip, hardwired processor and one or more soft processors are available for executing software. A soft processor is one that is implemented in the programmable logic resources of the PLD.
Analysis, selection, and implementation of the design in hardware and software parts may be difficult and costly. The designer may be confronted with balancing performance of the implemented design against the hardware resources available to implement the design. The resources available on the device, the impact different parts of the design have on overall performance, and an effective separation of hardware-implemented and software-implemented parts all must be considered separating the design into hardware and software components. The present invention may address one or more of the above issues.